Tans Computer - Intel Core 2 Extreme Mobile X9000 Dell XPS M1730

Intel Core 2 Extreme Mobile X9000 Dell XPS M1730

Written by Administrator, on 24-06-2008 00:07

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Dell Xps M1730

Today we havea look at Intel's new top-of-the-line Core 2 Mobile chip, the Core 2 Extreme Mobile X9000. At 2.8GHz with a full 6MB of L2 cache and a TDP of 35 Watts, this chip is currently Intel's fastestnotebook CPU for theperformance enthusiast, gaming, and multimedia markets,aka the Desktop Replacement(DTR)crowd. Our test vehicle was none other than Dell's XPS M1730 killer mobile gaming machine. A match made in heaven?Perhaps. Read on...

Intel Core 2 Extreme Mobile X9000 Processor

Features & Specifications :

2.8GHz Clock Speed, Dual-Core
"Penryn" Core Architecture
45nm Manufaturing Technology
128 kB L1 Cache (Data/Instruction)
6 MB Shared L2 Cache (Full Speed)
800MHz Front Side Bus Speed
Socket-478 Micro-FCPGA Form Factor Design
1.225V Default Core Voltage
Supports 32/64-bit Processing (EM64T)
Supports SSE / SSE2 / SSE3 / SSE4.1
Supports Intel Speedstep / C1,C2, C3, C4 and Intel Enhanced Deeper Sleep and Deep Power-Down states
Supports Execute Disable (xD) Bit

In the specs list above you can see that this new notebook chip from Intelshares nearly anidentical features list to that of the higher-end Core 2 Duo desktop chips based on Intel's Wolfdale core. However, Intel has also further enhanced this chip'spower-savings capability by turning downFSB speedsto 800MHz and introducing various stages of Intel SpeedstepC1 - C4 technology aswell asEnhanced Deeper Sleep and Deep Power-Down states. In the processor's Deeper Sleep state, all data that resides in L2 caches is dumped tomain system memory and then the cache is powered down as well to conserve power. L2cache ishigh speed, low latency SRAM technology thatconsumers significantly morepower than a standardDRAM cell. Powering down the cache also allows theNorthbridge memory controllerto stop making requests thus offeringthis "deeper" sleep state since it doesn'thave to wake the processor up lookingfor L2 cache data that isn't there anyway.

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